Grid View:

Coding-Based Low-Power Through-Silicon-Via Redundancy Schemes for Heterogeneous 3-D SoCs


Synopsis          Three dimensional integration is one of the promising solutions to check the bare 3D integrated circuits before utilizing in the applications. In the existing system design of an heterogeneous architecture is being evaluated using low power silicon redundancy schemes. The technique is b..

Design of Adiabatic Quantum-Flux-Parametron Register Files using a Top-Down Design Flow


Synopsis                                Electricity usage in global data centers is estimated 200 terawatts hour (TWh) each year, or about 1% of the total electricity consumed. This significant amount of en..

FPGA Implementation of Image Steganography Algorithms using Generalized Exploiting Modification Direction and Pixel Segmentation Strategy


Synopsis:             The generalized exploiting modification direction (GEMD) steganography algorithm is an enhancement of the exploiting modification direction (EMD) algorithm to hide a high payload capacity with maintaining the quality of the stego-image. In proposed system we developed..

RingNet: A Memory-Oriented Network-On-Chip


Existing system              In the existing system design of novel NoC architecture called RingNet that is well-suited to the features of contemporary FPGAs. Among other NoC architectures developed for FPGAs, RingNet stands out with communication through a central memory and traffic ..

SHIRT (Self Healing Intelligent Real Time) Scheduling for Secure Embedded Task Processing


Synopsis:           FPGA technology is used in all kinds of high speed devices now, which also need so many demands in Quick configuration of FPGA at runtime is the latest need. Scheduling in FPGAs is increasingly being employed in modern real-time embedded systems, which often impose strict timelin..

Test-Friendly Data-Selectable Self-Gating (DSSG)


Abstract◦        Clock networks consume large amounts of dynamic power,Clock gating is a common method for dynamic power reduction, and XOR self-gating is one of the useful clock gating methods for reducing meaningless clock toggling to provide extreme power reduction.◦       ..

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